ST72334J4TC View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST72334J4TC

8-bit MCU for automotive with single voltage Flash/ROM memory, ADC, 16-bit timers, SPI, SCI interfaces

STMicroelectronics 

ST72334xx-Auto, ST72314xx-Auto, ST72124Jx-Auto

13.2 MAIN CLOCK CONTROLLER WITH REAL-TIME CLOCK TIMER (MCC/RTC)

The Main Clock Controller consists of three differ-

ent functions:

■ a programmable CPU clock prescaler

■ a clock-out signal to supply external devices

■ a real-time clock timer with interrupt capability

Each function can be used independently and si-

multaneously.

13.2.1 Programmable CPU clock prescaler

The programmable CPU clock prescaler supplies

the clock for the ST7 CPU and its internal periph-

erals. It manages Slow power saving mode (See

Section 10.2 "SLOW MODE" on page 36 for more

details).

The prescaler selects the fCPU main clock frequen-

cy and is controlled by three bits in the MISCR1

register: CP[1:0] and SMS.

CAUTION: The prescaler does not act on the CAN

peripheral clock source. This peripheral is always

supplied by the fOSC/2 clock source.

13.2.2 Clock-out capability

The clock-out capability is an alternate function of

an I/O port pin that outputs a fOSC/2 clock to drive

external devices. It is controlled by the MCO bit in

the MISCR1 register.

CAUTION: When selected, the clock out pin sus-

pends the clock during Active Halt mode.

13.2.3 Real-time clock timer (RTC)

The counter of the real-time clock timer allows an

interrupt to be generated based on an accurate

real-time clock. Four different time bases depend-

ing directly on fOSC are available. The whole func-

tionality is controlled by four bits of the MCCSR

register: TB[1:0], OIE and OIF.

When the RTC interrupt is enabled (OIE bit set),

the ST7 enters Active Halt mode when the HALT

instruction is executed. See Section 10.4 "ACTIVE

HALT AND HALT MODES" on page 38 for more

details.

Figure 29. Main Clock Controller (MCC/RTC) Block Diagram

fOSC/2

PORT

ALTERNATE

FUNCTION

MCO

MISCR1

- - MCO -

- CP1 CP0 SMS

fOSC

DIV 2

RTC

COUNTER

MCCSR

0 0 0 0 TB1 TB0 OIE OIF

MCC/RTC INTERRUPT

DIV 2, 4, 8, 16

fCPU

CPU CLOCK

TO CPU AND

PERIPHERALS

53/150

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