PIC18F46K80T-I/SP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F46K80T-I/SP

28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

Microchip Technology 

PIC18F66K80 FAMILY

REGISTER 10-16: IPR3: PERIPHERAL INTERRUPT PRIORITY REGISTER 3

U-0

—

bit 7

U-0

R/W-1

R/W-1

R/W-1

R/W-1

R/W-1

—

RC2IP

TX2IP

CTMUIP

CCP2IP

CCP1IP

U-0

—

bit 0

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

Unimplemented: Read as ‘0’

RC2IP: EUSARTx Receive Priority Flag bit

1 = High priority

0 = Low priority

TX2IP: EUSARTx Transmit Interrupt Priority bit

1 = High priority

0 = Low priority

CTMUIP: CTMU Interrupt Priority bit

1 = High priority

0 = Low priority

CCP2IP: CCP2 Interrupt Priority bit

1 = High priority

0 = Low priority

CCP1IP: ECCP1 Interrupt Priority bit

1 = High priority

0 = Low priority

Unimplemented: Read as ‘0’

DS39977F-page 164

 2010-2012 Microchip Technology Inc.

Share Link: