PIC18F65K80T-I/SS View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F65K80T-I/SS

28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

Microchip Technology 

PIC18F66K80 FAMILY

SUBFSR

Syntax:

Operands:

Operation:

Status Affected:

Encoding:

Description:

Words:

Cycles:

Q Cycle Activity:

Q1

Decode

Subtract Literal from FSR

SUBFSR f, k

0  k  63

f  [ 0, 1, 2 ]

FSRf – k  FSRf

None

1110 1001 ffkk kkkk

The 6-bit literal ‘k’ is subtracted from

the contents of the FSR specified

by ‘f’.

1

1

Q2

Read

register ‘f’

Q3

Process

Data

Q4

Write to

destination

Example:

SUBFSR 2, 23h

Before Instruction

FSR2 = 03FFh

After Instruction

FSR2 = 03DCh

SUBULNK

Subtract Literal from FSR2 and Return

Syntax:

Operands:

Operation:

Status Affected:

Encoding:

Description:

SUBULNK k

0  k  63

FSR2 – k  FSR2,

(TOS) PC

None

1110 1001 11kk kkkk

The 6-bit literal ‘k’ is subtracted from the

contents of the FSR2. A RETURN is then

executed by loading the PC with the

TOS.

The instruction takes two cycles to

execute; a NOP is performed during the

second cycle.

This may be thought of as a special case

of the SUBFSR instruction, where f = 3

(binary ‘11’); it operates only on FSR2.

Words:

1

Cycles:

2

Q Cycle Activity:

Q1

Q2

Q3

Q4

Decode

Read

register ‘f’

Process

Data

Write to

destination

No

No

No

No

Operation Operation Operation Operation

Example:

SUBULNK 23h

Before Instruction

FSR2 = 03FFh

PC

= 0100h

After Instruction

FSR2 =

PC

=

03DCh

(TOS)

 2010-2012 Microchip Technology Inc.

DS39977F-page 529

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