ST7262
15 KNOWN LIMITATIONS
15.1 UNEXPECTED RESET FETCH
If an interrupt request occurs while a "POP CC" in-
struction is executed, the interrupt controller does
not recognise the source of the interrupt and, by
default, passes the RESET vector address to the
CPU.
Workaround
To solve this issue, a "POP CC" instruction must
always be preceded by a "SIM" instruction.
15.2 HALT MODE POWER CONSUMPTION
WITH ADC ON
If the A/D converter is being used when Halt mode
is entered, the power consumption in Halt Mode
may exceed the maximum specified in the datash-
eet.
Workaround
Switch off the ADC by software (ADON=0) before
executing a HALT instruction.
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