STM32F302xx/STM32F303xx
Electrical characteristics
Table 68. ADC accuracy - limited test conditions (1)(2)
Symbol Parameter
Conditions
Min
(3)
Typ Max(3) Unit
Total
ET unadjusted
error
Fast channel 5.1 Ms
Single ended
Slow channel 4.8 Ms
Fast channel 5.1 Ms
Differential
Slow channel 4.8 Ms
- ±3.5 ±6
- ±4.5 ±7
- ±3.5 ±6
- ±3.5 ±6
EO Offset error
Fast channel 5.1 Ms - ±1 ±5
Single ended
Slow channel 4.8 Ms - ±1 ±5
Fast channel 5.1 Ms - ±1 ±3
Differential
Slow channel 4.8 Ms - ±1 ±3
EG Gain error
Fast channel 5.1 Ms - ±3 ±6
Single ended
Slow channel 4.8 Ms - ±4 ±6
LSB
Fast channel 5.1 Ms - ±1 ±2
Differential
Slow channel 4.8 Ms - ±1.5 ±3
Differential
ED linearity
error
ADC clock freq.
Fast channel 5.1 Ms - ±1 ±1
Single ended
Slow channel 4.8 Ms - ±1 ±1.5
≤ 72 MHz
Sampling freq ≤ 5
Msps
Fast channel 5.1 Ms - ±1 ±1
Differential
Slow channel 4.8 Ms - ±1 ±1
Integral
EL linearity
error
VDDA = VREF+ = 3.3 V
Fast channel 5.1 Ms
25°C
Single ended
Slow channel 4.8 Ms
Fast channel 5.1 Ms
Differential
Slow channel 4.8 Ms
- ±1.5 ±3
- ±2 ±3
- ±1 ±2
- ±1 ±2
Effective
ENOB number of
bits
SINAD
Signal-to-
noise and
distortion
ratio
Fast channel 5.1 Ms 10.3 10.7 -
Single ended
Slow channel 4.8 Ms 10.4 10.7 -
bits
Fast channel 5.1 Ms 10.9 11.3 -
Differential
Slow channel 4.8 Ms 10.9 11.3 -
Fast channel 5.1 Ms 64 66 -
Single ended
Slow channel 4.8 Ms 65 66 -
dB
Fast channel 5.1 Ms 67 70 -
Differential
Slow channel 4.8 Ms 67 70 -
Doc ID 023353 Rev 5
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