Electrical characteristics
STM32F302xx/STM32F303xx
6.1.6
Power supply scheme
Figure 11. Power supply scheme
VBAT
1.65 - 3.6V
Po wer swi tch
Backup circuitry
(LSE,RTC,
Wake-up logic
Backup registers)
GP I/Os
VDD
4 × 100 nF
+ 1 × 4.7 μF
4 × VDD
3 × VSS
VDDA
VDDA
VREF
10 nF
+ 1 μF
10 nF
+ 1 μF
VSSA
O UT
IO
Logic
IN
Regulator
Kernel logic
(CPU,
Digital
& Memories)
VREF+
VREF-
ADC/
DAC
!NALOG 2#S 0,,
COMPARATORS /0!-0
MS19875V3
Caution:
1. Dotted lines represent the internal connections on low pin count packages, joining the dedicated supply
pins.
Each power supply pair (VDD/VSS, VDDA/VSSA etc..) must be decoupled with filtering
ceramic capacitors as shown above. These capacitors must be placed as close as possible
to, or below the appropriate pins on the underside of the PCB to ensure the good
functionality of the device.
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Doc ID 023353 Rev 5