ST72F324K2TATXS View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST72F324K2TATXS

8-bit MCU for automotive, 3.8 to 5.5V operating range with 8 to 32 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI

STMicroelectronics 

ST72324xx-Auto

I/O ports

Analog alternate function

When the pin is used as an ADC input, the I/O must be configured as floating input. The

analog multiplexer (controlled by the ADC registers) switches the analog voltage present on

the selected pin to the common analog rail which is connected to the ADC input.

It is recommended not to change the voltage level or loading on any port pin while

conversion is in progress. Furthermore it is recommended not to have clocking pins located

close to a selected analog pin.

Warning: The analog input voltage level must be within the limits

stated in the absolute maximum ratings.

duct(s) - Obsolete Product(s) 9.3

I/O port implementation

The hardware implementation on each I/O port depends on the settings in the DDR and OR

registers and specific feature of the I/O port such as ADC Input or true open drain.

Switching these I/O ports from one state to another should be done in a sequence that

prevents unwanted side effects. Recommended safe transitions are illustrated in Figure 29.

Other transitions are potentially risky and should be avoided, since they are likely to present

unwanted side-effects such as spurious interrupt generation.

Figure 29. Interrupt I/O port state transitions

01

00

10

11

Input

Input

Output

floating/pull-up floating open-drain

interrupt (reset state)

Output

push-pull

XX = DDR, OR

te Pro 9.4

Low power modes

soleTable 30. Effect of low power modes on I/O ports

Ob Mode

Description

Wait

No effect on I/O ports. External interrupts cause the device to exit from Wait mode.

Halt

No effect on I/O ports. External interrupts cause the device to exit from Halt mode.

9.5

Interrupts

The external interrupt event generates an interrupt if the corresponding configuration is

selected with DDR and OR registers and the interrupt mask in the CC register is not active

(RIM instruction).

Doc ID 13841 Rev 1

63/193

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