ST72F324K2TATXS View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
ST72F324K2TATXS
STMicroelectronics
ST72F324K2TATXS Datasheet PDF : 194 Pages
| |||
On-chip peripherals
ST72324xx-Auto
Figure 32. Exact timeout duration (tmin and tmax)
WHERE:
tmin0 = (LSB + 128) x 64 x tOSC2
tmax0 = 16384 x tOSC2
tOSC2 = 125ns if fOSC2 = 8 MHz
CNT = value of T[5:0] bits in the WDGCR register (6 bits)
MSB and LSB are values from the table below depending on the timebase selected by the TB[1:0] bits in the MCCSR
register
TB1 bit
(MCCSR reg.)
TB0 bit
(MCCSR reg.)
Selected MCCSR timebase
MSB
LSB
0
0
) 0
1
t(s 1
0
c 1
1
2ms
4ms
10ms
25ms
4
59
8
53
20
35
49
54
rodu To calculate the minimum Watchdog timeout (tmin):
te P IF CNT <
M------S----B---
4
THEN
tmin = tmin0 + 16384 × CNT × tosc2
sole ELSE
tmin = tmin0 +
16384
×
⎛
⎝
C
NT
–
4----C-----N-----T--
MSB
⎞
⎠
+
( 192
+
LSB)
×
64
×
4----C-----N-----T--
MSB
× tosc2
Ob To calculate the maximum Watchdog timeout (tmax):
t(s) - IF CNT ≤
M------S----B---
4
THEN
tmax = tmax0 + 16384 × CNT × tosc2
uc ELSE
tmax = tmax0 +
16384 × ⎝⎛CNT –
4----C-----N-----T--
MSB
⎞
⎠
+
(192
+
LSB)
×
64
×
4----C-----N-----T--
MSB
× tosc2
rod NOTE: In the above formulae, division results must be rounded down to the next integer value.
P EXAMPLE: With 2ms timeout selected in MCCSR register
lete Value of T[5:0] bits in WDGCR register
(Hex.)
so 00
Ob 3F
Min. Watchdog timeout (ms)
tmin
1.496
128
Max. Watchdog timeout (ms)
tmax
2.048
128.552
68/193
Doc ID 13841 Rev 1
Share Link: 