PCA85133U/2DA/Q1(2009) View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
Manufacturer
PCA85133U/2DA/Q1 Datasheet PDF : 44 Pages
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NXP Semiconductors
PCA85133
Universal LCD driver for low multiplex rates
7.16.5 Input filters
To enhance noise immunity in electrically adverse environments, RC low-pass filters are
provided on the SDA and SCL lines.
7.16.6 I2C-bus protocol
Two I2C-bus slave addresses (0111 000 and 0111 001) are reserved for the PCA85133.
The least significant bit of the slave address is bit R/W. The PCA85133 is a write-only
device. It will not respond to a read access, so this bit should always be logic 0. The
second bit of the slave address is defined by the level tied at input SA0. Two types of
PCA85133 can be distinguished on the same I2C-bus which allows:
• Up to 16 PCA85133 on the same I2C-bus for very large LCD applications
• The use of two types of LCD multiplex drive modes on the same I2C-bus
The I2C-bus protocol is shown in Figure 15. The sequence is initiated with a START
condition (S) from the I2C-bus master which is followed by one of the available PCA85133
slave addresses. All PCA85133 with the same SA0 level acknowledge in parallel to the
slave address. All PCA85133 with the alternative SA0 level ignore the whole I2C-bus
transfer.
R/W = 0
slave address
control byte
S
0
1
1
1
0
0
S
A
0
0
A
C
O
R
S
RAM/command byte
M
AS
B
L
SP
B
EXAMPLES
a) transmit two bytes of RAM data
S
S01 1 1 0 0 A0A01
0
A
RAM DATA
A
RAM DATA
AP
b) transmit two command bytes
S
S01 1 1 0 0 A0A10
0
A
COMMAND
A0 0
A
COMMAND
AP
c) transmit one command byte and two RAM date bytes
S
S01 1 1 0 0 A0A10
A
0
COMMAND
A0 1
Fig 15. I2C-bus protocol
A
RAM DATA
A
RAM DATA
AP
mgl752
After acknowledgement, the control byte is sent, defining if the next byte is a RAM or
command information. The control byte also defines if the next byte is a control byte or
further RAM or command data (see Figure 16 and Table 8). In this way it is possible to
configure the device and then fill the display RAM with little overhead.
PCA85133_1
Product data sheet
Rev. 1 — 23 October 2009
© NXP B.V. 2009. All rights reserved.
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