QL82SD-5PS484C View Datasheet(PDF) - QuickLogic Corporation

Part Name

Description

Manufacturer

QL82SD-5PS484C

LVDS SERDES, flexible programmable logic, dual port SRAM.

QuickLogic Corporation 

QL82SD Device Data Sheet Rev C

Table 25: Standard Input Delays

Symbol

Parameter

Standard

Input Delays

tSID (LVTTL)

tSID (LVCMOS2)

tSID (GTL+)

tSID (SSTL3)

tSID (SSTL2)

To get the total input delay and this delay to tISU

LVTTL input delay: Low Voltage TTL for 3.3 V applications

LVCMOS2 input delay: Low Voltage CMOS for 2.5 V and

lower applications

GTL+ input delay: Gunning Transceiver Logic

SSTL3 input delay: Stub Series Terminated Logic for 3.3 V

SSTL2 input delay: Stub Series Terminated Logic for 2.5V

Propagation

delay (ns)

0.34

0.42

0.68

0.55

0.607

R

CLK

D

tISU

tIH

Q

tICLK

tIRST

E

tIESU

tIEH

Figure 37: Input Register Timing

PAD

OUTPUT

REGISTER

•

26

•

•

•

www.quicklogic.com

•

•

Figure 38: Output Register Cell

Preliminary

© 2002 QuickLogic Corporation

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