SMC032BF View Datasheet(PDF) - STMicroelectronics
Part Name
Description
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SMC032BF Datasheet PDF : 91 Pages
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Card Configuration
SMCxxxBF
6.5
Attribute Memory Function
Attribute memory is a space where identification and configuration information are stored.
Only 8 bit wide accesses at even addresses can be performed in this area. The Card
configuration registers are also located in the Attribute Memory area, at base address 200h.
Attribute memory is not accessible in True IDE mode of operation.
For the Attribute Memory Read function, signals –REG and –OE must be active and –WE
inactive during the cycle. As in the Main Memory Read functions, the signals –CE1 and –
CE2 control the even and odd Byte address, but only the even Byte data is valid during the
Attribute Memory access. Refer to Table 32 for signal states and bus validity.
Table 32. Attribute Memory Function
Function Mode
–CE2 –CE1
–REG (1)
(1) A10 A9
–OE –WE
A0
(1)
(1) D15 to D8 D7 to D0
Standby
X
H
H
X
X
X
X
X High-Z
High-Z
Read Byte Access CIS
(8 bits)
L
H
L
L
L
L
L
H High-Z
Even Byte
Write Byte Access CIS
(8 bits) Invalid
L
H
L
L
L
L
H
L Don’t Care Even Byte
Read Byte Access
Configuration
(8 bits)
L
H
L
L
H
L
L
H High-Z
Even Byte
Write Byte Access
Configuration
(8 bits)
L
H
L
L
H
L
H
L Don’t Care Even Byte
Read Word Access CIS
L
L
L
L
L
X
L
H Not Valid Even Byte
(16 bits)
Write Word Access CIS
L
L
L
L
L
X
H
L Don’t Care Even Byte
(16 bits) Invalid
Read Word Access
Configuration (16 bits)
L
L
L
L
H
X
L
H Not Valid Even Byte
Write Word Access
Configuration (16 bits)
L
L
L
L
H
X
H
L Don’t Care Even Byte
1. The –CE signal or both the –OE signal and the –WE signal must be de-asserted between consecutive cycle operations.
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