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AD5391BSTZ-3(RevF) View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
AD5391BSTZ-3 Datasheet PDF : 44 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD5390/AD5391/AD5392
Data Sheet
AD5390-3/AD5391-3/AD5392-3 AC CHARACTERISTICS
AVDD = 2.7 V to 3.6 V; DVDD = 2.7 V to 5.5 V; AGND = DGND = 0 V; CL = 200 pF to AGND.
Table 4.
Parameter
DYNAMIC PERFORMANCE
Output Voltage Settling Time
AD5390/AD5392
AD5391
Slew Rate2
Digital-to-Analog Glitch Energy
Glitch Impulse Peak Amplitude
Channel-to-Channel Isolation
DAC-to-DAC Crosstalk
Digital Crosstalk
Digital Feedthrough
OUTPUT NOISE (0.1 Hz to 10 Hz)
Output Noise Spectral Density
@ 1 kHz
@ 10 kHz
All1 Unit
3
µs typ
8
µs max
3
µs typ
8
µs max
2.5 V/µs typ
1.5 V/µs typ
12 nV-s typ
15 mV typ
100 dB typ
1
nV-s typ
0.8 nV-s typ
0.1 nV-s typ
15 µV p-p typ
40 µV p-p typ
150 nV/(Hz)1/2 typ
100 nV/(Hz)1/2 typ
Test Conditions/Comments
¼ scale to ¾ scale change settling to ±1 LSB
Boost mode off, CR11 = 0
Boost mode off, CR11 = 0
Boost mode off, CR11 = 0
Boost mode on, CR11 = 1
Boost mode on
Boost mode off, CR11 = 0
See the Terminology section
See the Terminology section
Effect of input bus activity on DAC output under test
External reference midscale loaded to DAC
Internal reference midscale loaded to DAC
1 Guaranteed by design and characterization, not production tested.
2 The slew rate can be programmed via the current boost control bit in the AD5390/AD5391/AD5392 control registers.
Rev. F | Page 10 of 44

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