STA309A13TR View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STA309A13TR

Multi-channel digital audio processor with DDX®

STMicroelectronics 

STA309A

Registers

7.2.4

Table 20. SAO serial clock (continued)

BICKI = BICKO

SAO[3:0]

Interface data format

0000

I2S data

0001

Left-justified data

64 * fs

0010

0011

Right-justified 24-bit data

Right-justified 20-bit data

0100

Right-justified 18-bit data

0101

Right-justified 16-bit data

Configuration register D (0x03)

D7

MPC

1

D6

CSZ4

1

D5

CSZ3

0

D4

CSZ2

0

D3

CSZ1

0

D2

CSZ0

0

D1

OM1

1

D0

OM0

0

Table 21. OM bits

Bit RW RST

Name

Description

0

RW

0

OM0

1

RW

1

OM1

DDX power output mode: selects configuration of

DDX output.

The DDX power output mode selects how the DDX output timing is configured. Different

power devices use different output modes. The STA50x recommended use is OM = 10.

Table 22. Output stage mode

OM[1:0]

Output stage - mode

00

STA50x/STA51xB - drop compensation

01

Discrete output stage - tapered compensation

10

STA50x/STA51xB - full power mode

11

Variable drop compensation (CSZn bits)

Table 23. CSZ bits

Bit RW RST

Name

2

RW

0

CSZ0

3

RW

0

CSZ1

4

RW

0

CSZ2

5

RW

0

CSZ3

6

RW

1

CSZ4

Description

Contra size register: when OM[1,0] = 11, this register

determines the size of the DDX compensating pulse

from 0 clock ticks to 31 clock periods.

Doc ID 13855 Rev 4

27/67

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