ADP1878ACPZ-0.6-R7(RevA) View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADP1878ACPZ-0.6-R7
(Rev.:RevA)

Synchronous Buck Controller with Constant On Time and Valley Current Mode

Analog Devices 

Data Sheet

The rise in package temperature (for a 14-lead LFCSP_WD) is

TR = θJA × PDR(LOSS)

= 30°C × 132.05 mW

= 4.0°C

Assuming a maximum ambient temperature environment of 85°C,

TJ = TR × TA = 4.0°C + 85°C = 89.0°C,

which is below the maximum junction temperature of 125°C.

DESIGN EXAMPLE

The ADP1878/ADP1879 are easy to use, requiring only a few

design criteria. For example, the example outlined in this section

uses only four design criteria: VOUT = 1.8 V, ILOAD = 15 A (pulsing),

VIN = 12 V (typical), and fSW = 300 kHz.

Input Capacitor

The maximum input voltage ripple is usually 1% of the

minimum input voltage (11.8 V × 0.01 = 120 mV).

VRIPP = 120 mV

VMAX,RIPPLE = VRIPP − (ILOAD,MAX × ESR)

= 120 mV − (15 A × 0.001) = 45 mV

,

,

4

,

= 120 μF

4 300

15 A

10

105 mV

Choose five 22 μF ceramic capacitors. The overall ESR of five

22 μF ceramic capacitors is less than 1 mΩ.

IRMS = ILOAD/2 = 7.5 A

PCIN = (IRMS)2 × ESR = (7.5 A)2 × 1 mΩ = 56.25 mW

Inductor

Determining inductor ripple current amplitude:

∆

3

5A

Then, calculating for the inductor value

,

∆

13.2 V – 1.8 V

5 V 300 10

= 1.03 μH

,

1.8 V

13.2 V

The inductor peak current is approximately

15 A + (5 A × 0.5) = 17.5 A

Therefore, an appropriate inductor selection is 1.0 μH with

DCR = 3.3 mΩ (Würth Elektronik 7443552100) with a peak

current handling of 20 A.

= 0.003 × (15 A)2 = 675 mW

ADP1878/ADP1879

Current-Limit Programming

The valley current is approximately

15 A − (5 A × 0.5) = 12.5 A

Assuming a low-side MOSFET RON of 4.5 mΩ and 13 A, as the

valley current limit from Table 7 and Figure 71 indicate, a pro-

gramming resistor (RES) of 100 kΩ corresponds to an ACS

of 24 V/V.

Choose a programmable resistor of RRES = 100 kΩ for a current

sense gain of 24 V/V.

Output Capacitor

Assume that a load step of 15 A occurs at the output and no more

than 5% output deviation is allowed from the steady state operating

point. In this case, the advantage of the ADP1878 is that because

the frequency is pseudo fixed, the converter is able to respond

quickly because of the immediate, though temporary, increase

in switching frequency.

ΔVDROOP = 0.05 × 1.8 V = 90 mV

Assuming the overall ESR of the output capacitor ranges from

5 mΩ to 10 mΩ,

2

∆

∆

2

300

15 A

10 90 mV

= 1.11 mF

Therefore, an appropriate inductor selection is five 270 μF

polymer capacitors with a combined ESR of 3.5 mΩ.

Assuming an overshoot of 45 mV, determine if the output

capacitor that was calculated previously is adequate

∆

1 10

15 A

1.8 45 mV

1.8

= 1.4 mF

Choose five 270 μF polymer capacitors.

The rms current through the output capacitor is

11

,

2 √3

,

1

2

1 13.2 V – 1.8 V

√3 1 μF 300 103

1.8 V

13.2 V

1.49 A

The power loss dissipated through the ESR of the output

capacitor is

PCOUT = (IRMS)2 × ESR = (1.5 A)2 × 1.4 mΩ = 3.15 mW

Rev. A | Page 29 of 40

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