Z8018X View Datasheet(PDF) - Zilog

Part Name

Description

Manufacturer

Z8018X

Family MPU

Zilog 

Z8018x Family

MPU User Manual

285

– DREQ0, DREQ1 = 1

memory to/from (memory mapped)

I/O DMA transfer

– BCR0, BCR1 = 0000H (all DMA transfers)

– NMI = 0 (all DMA transfers)

OTHER OPERATION MODE TRANSITIONS

The following operation mode transitions are also possible.

1. HALT

IOSTOP

2. SLEEP

SYSTEM STOP

{ } DMA

REFRESH

BUS RELEASE

{ } DMA

REFRESH

BUS RELEASE

BUS RELEASE

BUS RELEASE

UM005001-ZMP0400

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