T2080NXE8MQLB View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
Manufacturer
T2080NXE8MQLB Datasheet PDF : 186 Pages
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Hardware design considerations
1 kΩ
OVDD
From target
board sources
(if any)
HRESET_B
PORESET_B
10 kΩ
5
HRESET_B4
10 kΩ
PORESET_B1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Duplex 34 Connector
Physical Pinout
22
20, 25
27, 31
32, 33
RESET
NC B
A
3
10 kΩ
10 kΩ
12
2
6
10
8
4
34
18
16
14
26
28
1
3
7
9
13
15
19
21
5, 11, 17
23, 24
29, 30
10 kΩ
AURORA_TRST_B
VIO VSense2
1 kΩ
AURORA_TMS
AURORA_TDO
AURORA_TDI
AURORA_TCK
Vendor I/O 5 (Aurora_HRESET_B)
Vendor I/O 2 (Aurora_Event_Out_B)
Vendor I/O 1 (Aurora_Event_In_B)
Vendor I/O 0 (Aurora_HALT_B)
CLK_P 100 nF
CLK_N 100 nF
10 kΩ
TX0_P
TX0_N
TX1_P
TX1_N
RX0_P
RX0_N
RX1_P
RX1_N
0.01 uF
0.01 uF
0.01 uF
0.01 uF
6
6
TRST_B1
TMS
TDO
TDI
TCK
EVT[4]
EVT[1]
EVT[0]
SD2_REF_CLKn_P
SD2_REF_CLKn_N
SD2_TX5_P
SD2_TX5_N
SD2_TX4_P
SD2_TX4_N
SD2_RX5_P
SD2_RX5_N
SD2_RX4_P
SD2_RX4_N
REF_CLK_NREF_CLK_P
REF_CLK1_P
REF_CLK1_N
Notes:
1. The Aurora port and target board should be able to independently assert PORESET_B and TRST_B to the processor in
order to fully control the processor as shown here.
2. Populate this with a 1 kΩ resistor for short-circuit/current-limiting protection.
3. This switch is included as a precaution for BSDL testing. The switch should be closed to position A during BSDL testing to avoid accidentally
asserting the TRST_B line. If BSDL testing is not being performed, this switch should be closed to position B.
4. Asserting HREST_B causes a hard reset on the device
5. This is an open-drain output gate.
6. REF_CLK_P/REF_CLK_N and REF_CLK1_P/REFCLK1_N are buffered clocks from the same common source.
Figure 63. Aurora 34 pin connector duplex interface connection
QorIQ T2080 Data Sheet, Rev. 3, 03/2018
NXP Semiconductors
171
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