ST72361J4-AUTO View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
ST72361J4-AUTO
STMicroelectronics
ST72361J4-AUTO Datasheet PDF : 279 Pages
| |||
ST72361xx-Auto
Central processing unit
4.3.4
Figure 8. CPU registers
7
0
RESET VALUE = XXh
7
0
RESET VALUE = XXh
7
0
RESET VALUE = XXh
15
PCH
87
PCL
0
RESET VALUE = RESET VECTOR @ FFFEh-FFFFh
7
0
1 1 I1 H I0 N Z C
RESET VALUE = 1 1 1 X 1 X X X
15
87
0
RESET VALUE = STACK HIGHER ADDRESS
ACCUMULATOR
X INDEX REGISTER
Y INDEX REGISTER
PROGRAM COUNTER
CONDITION CODE REGISTER
STACK POINTER
X = Undefined Value
Condition code register (CC)
Read/ write
Reset value: 111x1xxx
7
0
1
1
I1
H
I0
N
Z
C
The 8-bit Condition Code register contains the interrupt masks and four flags representative
of the result of the instruction just executed. This register can also be handled by the PUSH
and POP instructions.
These bits can be individually tested and/or controlled by specific instructions.
Arithmetic management bits
Bit 4 = H Half carry.
This bit is set by hardware when a carry occurs between bits 3 and 4 of the ALU during an
ADD or ADC instructions. It is reset by hardware during the same instructions.
0: No half carry has occurred.
1: A half carry has occurred.
This bit is tested using the JRH or JRNH instruction. The H bit is useful in BCD arithmetic
subroutines.
Bit 2 = N Negative.
This bit is set and cleared by hardware. It is representative of the result sign of the last
arithmetic, logical or data manipulation. It’s a copy of the result 7th bit.
0: The result of the last operation is positive or null.
1: The result of the last operation is negative (that is, the most significant bit
is a logic 1).
Doc ID 12468 Rev 3
35/279
Share Link: 