ST72361J4-AUTO View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST72361J4-AUTO

8-bit MCU for automotive with Flash or ROM, 10-bit ADC, 5 timers, SPI, LINSCI™

STMicroelectronics 

ST72361xx-Auto

Supply, reset and clock management

If trv is greater than 256 or 4096 cycles then:

● If the AVD interrupt is enabled before the VIT+(AVD) threshold is reached, then two AVD

interrupts will be received: The first when the AVDIE bit is set and the second when the

threshold is reached.

● If the AVD interrupt is enabled after the VIT+(AVD) threshold is reached, then only one

AVD interrupt occurs.

Figure 16. Using the AVD to monitor VDD

VDD

VIT+(AVD)

Early Warning Interrupt

(Power has dropped, MCU not

not yet in reset)

Vhyst

VIT-(AVD)

VIT+(LVD)

VIT-(LVD)

trv VOLTAGE RISE TIME

AVDF bit

0

AVD INTERRUPT

REQUEST

IF AVDIE bit = 1

LVD RESET

1

RESET VALUE

INTERRUPT PROCESS

1

0

INTERRUPT PROCESS

5.6.3

5.6.4

Low power modes

Table 9. Effect of low power modes on SI

Mode

Description

WAIT

No effect on SI. AVD interrupts cause the device to exit from Wait mode.

HALT

The SICSR register is frozen.

Interrupts

The AVD interrupt event generates an interrupt if the AVDIE bit is set and the interrupt mask

in the CC register is reset (RIM instruction).

Table 10. Interrupt control/wake-up capability

Interrupt event

Event

flag

Enable

control

bit

AVD event

AVDF

AVDIE

Exit

from

wait

Yes

Exit

from

halt

No

Doc ID 12468 Rev 3

45/279

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