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STM32WB55CCU6ATR View Datasheet(PDF) - STMicroelectronics

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Description
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STM32WB55CCU6ATR Datasheet PDF : 193 Pages
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Electrical characteristics
STM32WB55xx STM32WB35xx
Table 95. Quad-SPI characteristics in DDR mode(1)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
1.65 < VDD < 3.6 V, CLOAD = 20 pF
Voltage Range 1
-
-
40
FCK Quad-SPI clock
2.0 < VDD < 3.6 V, CLOAD = 20 pF
Voltage Range 1
-
1/t(CK) frequency
1.65 < VDD < 3.6 V, CLOAD = 15 pF
Voltage Range 1
-
-
50
MHz
-
48
1.65 < VDD < 3.6 V CLOAD = 20 pF
Voltage Range 2
-
-
16
tw(CKH)
tw(CKL)
tsr(IN)
Quad-SPI clock
high and low time
Data input setup
time on rising edge
fAHBCLK = 48 MHz, presc=0
Voltage Range 1
Voltage Range 2
t(CK)/2
-
t(CK)/2 + 1
t(CK)/2 - 1
-
t(CK)/2
2.5
-
-
3.5
tsf(IN)
Data input setup Voltage Range 1
time on falling edge Voltage Range 2
2.5
-
-
1.5
thr(IN)
Data input hold
Voltage Range 1
time on rising edge Voltage Range 2
5.5
-
-
6.5
thf(IN)
Data input hold
Voltage Range 1
time on falling edge Voltage Range 2
5
-
-
6
tvr(OUT)
Data output valid
time on rising edge
Voltage Range 1
Voltage Range 2
DHHC=0
4
5.5
ns
DHHC=1
-
t(CK)/2 + 1 t(CK)/2 + 1.5
4.5
7
tvf(OUT)
Data output valid Voltage Range 1
time on falling edge
Voltage Range 2
DHHC=0
4
6
DHHC=1
-
t(CK)/2 + 1 t(CK)/2 + 2
6
7.5
DHHC=0
2
-
-
thr(OUT)
Data output hold
time on rising edge
Voltage Range 1
DHHC=1 t(CK)/2 + 0.5
-
-
Voltage Range 2
3.5
-
-
DHHC=0
3
-
-
thf(OUT)
Data output hold Voltage Range 1
time on falling edge
DHHC=1 t(CK)/2 + 0.5
-
-
Voltage Range 2
5
-
-
1. Guaranteed by characterization results.
164/193
DS11929 Rev 10

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