STM32WB55RGQ7TR View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM32WB55RGQ7TR

Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M4 with FPU, Bluetooth® 5 and 802.15.4 radio solution

STMicroelectronics 

STM32WB55xx STM32WB35xx

Electrical characteristics

Table 20. Voltage characteristics(1)

Symbol

Ratings

Min

Max

Unit

External main supply voltage

VDDX - VSS (including VDD, VDDA, VDDUSB, VLCD, VDDRF,

-0.3

4.0

VDDSMPS, VBAT, VREF+)

VIN(2)

Input voltage on FT_xxx pins

Input voltage on TT_xx pins

miVnD(DVRDFD,,VVDDDDSAM, PVSD)D+U4S.B0,(V3)L(4C)D,

V

VSS-0.3

4.0

Input voltage on any other pin

4.0

|∆VDDx|

Variations between different VDDX power pins

of the same domain

-

|VSSx-VSS|

Variations between all the different ground

pins(5)

-

50

mV

50

VREF+ - VDDA Allowed voltage difference for VREF+ > VDDA

-

0.4

V

1.

All main

external

power

power

(sVuDpDp,lyV, iDnDtRhFe,

pVeDrDmAi,ttVedDDraUnSgB,eV. LCD,

VBAT)

and

ground

(VSS,

VSSA)

pins

must

always

be

connected

to

the

2. VIN maximum must always be respected. Refer to Table 21 for the maximum allowed injected current values.

3. This formula has to be applied only on the power supplies related to the IO structure described in the pin definition table.

4. To sustain a voltage higher than 4 V the internal pull-up/pull-down resistors must be disabled.

5. Include VREF- pin.

Table 21. Current characteristics

Symbol

Ratings

Max

Unit

∑IVDD

Total current into sum of all VDD power lines (source)(1)

130

∑IVSS

Total current out of sum of all VSS ground lines (sink)(1)

130

IVDD(PIN) Maximum current into each VDD power pin (source)(1)

100

IVSS(PIN) Maximum current out of each VSS ground pin (sink)(1)

100

Output current sunk by any I/O and control pin except FT_f

20

IIO(PIN)

Output current sunk by any FT_f pin

Output current sourced by any I/O and control pin

20

mA

20

Total output current sunk by sum of all I/Os and control pins(2)

100

∑IIO(PIN)

Total output current sourced by sum of all I/Os and control pins(2)

100

IINJ(PIN)(3)

Injected current on FT_xxx, TT_xx, RST and B pins, except PB0 and PB1

Injected current on PB0 and PB1

–5 / +0(4)

-5/0

∑|IINJ(PIN)| Total injected current (sum of all I/Os and control pins)(5)

25

1. Apollwmearinsuppopwlieesr ,(VinDtDh,eVpDeDrRmFi,ttVedDDraAn, VgeD.DUSB, VBAT) and ground (VSS, VSSA) pins must always be connected to the external

2. This current consumption must be correctly distributed over all I/Os and control pins. The total output current must not be

sunk/sourced between two consecutive power supply pins referring to high pin count packages.

3. sPpoescitiifvieedinmjeacxtiiomnum(whveanlueV.IN > VDD) is not possible on these I/Os and does not occur for input voltages lower than the

4.

A negative injection is

characteristics for the

minadxuicmeudmbyalVloINwe<dVinSSp.uItINvJo(lPtaINg)emvuaslut ense.ver

be

exceeded.

Refer

also

to

Table

20:

Voltage

DS11929 Rev 10

85/193

169

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