AT83C51RB2-3CSCM データシートの表示（PDF） - Atmel Corporation

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AT83C51RB2-3CSCM

80C51 High Performance ROM 8-bit Microcontroller

Atmel Corporation 

AT80C51RD2/AT83C51Rx2

Table 31. BDRCON Register

BDRCON - Baud Rate Control Register (9Bh)

7

6

5

4

3

2

1

0

-

-

-

BRR

TBCK

RBCK

SPD

SRC

Bit

Number

7

6

5

4

3

2

1

0

Bit

Mnemonic Description

-

Reserved

The value read from this bit is indeterminate. Do not set this bit

-

Reserved

The value read from this bit is indeterminate. Do not set this bit

-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

BRR

Baud Rate Run Control bit

Cleared to stop the internal Baud Rate Generator.

Set to start the internal Baud Rate Generator.

TBCK

Transmission Baud rate Generator Selection bit for UART

Cleared to select Timer 1 or Timer 2 for the Baud Rate Generator.

Set to select internal Baud Rate Generator.

RBCK

Reception Baud Rate Generator Selection bit for UART

Cleared to select Timer 1 or Timer 2 for the Baud Rate Generator.

Set to select internal Baud Rate Generator.

SPD

Baud Rate Speed Control bit for UART

Cleared to select the SLOW Baud Rate Generator.

Set to select the FAST Baud Rate Generator.

SRC

Baud Rate Source select bit in Mode 0 for UART

Cleared to select FOSC/12 as the Baud Rate Generator (FCLK PERIPH/6 in X2

mode).

Set to select the internal Baud Rate Generator for UARTs in mode 0.

Reset Value = XXX0 0000b

Not bit addressable

45

4113B–8051–03/05

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