CS98100 データシートの表示（PDF） - Cirrus Logic
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CS98100 Datasheet PDF : 60 Pages
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CS98100
6.3 SDRAM Interface
These pins are used to interface the CS98100 with
external SDRAM of various sizes. Typical config-
urations are two 1 Mbyte x16-bit, or one 2 Mbyte
x32-bit. Table 18 gives instructions on how to in-
terface any particular configuration of SDRAM.
Pin
43, 44, 45, 46,
47, 49, 51, 52,
53, 54, 55, 63,
64, 65, 70, 72,
73, 74, 76, 77,
78, 80, 83, 5,
6, 7, 9, 11, 12, 13,
14, 16
2, 3, 4, 84, 85, 96,
97, 98,
100,101,102, 103
20
17
35
37
40
42
199
203,202,201,200
Signal Name
M_D[31:0]
Type
B
Description
Memory Data Bus. CS98100 can use all 32 bits or can use
only M_D[15:0], in which case M_D[31:16] can be left
unconnected.note: 32 bits wide is recommended
M_A[11.0]
O
Memory Address Bus. Connect in order starting with M_A[0]
to all RAM address pins not already connected to DR_BS_N
or DR_AP.
DR_CKO
O
Memory Clock
DR_CKE
O
Memory Clock Enable
DR_BS_N
O
Bank Selection. Always connect to RAM BS or BS0 pin.
DR_AP
O
Memory Auto Pre-charge. Always connect to RAM AP pin.
DR_RAS_N
O
Memory Row Address Strobe
DR_CAS_N
O
Memory Column Address Strobe
DR_WE_N
O
Memory Write Enable
DR_DQM[3..0] O
IO Mask of Data Bus DR_DQM[3] -> DR_Data[31:24]
Table 18. SDRAM Interface Pin Assignments
48
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