CS98100 データシートの表示（PDF） - Cirrus Logic
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CS98100 Datasheet PDF : 60 Pages
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CS98100
6.4 ROM/NVRAM Interface
This interface connects to the non-volatile memory
that contains the firmware. The memory could be
ROM, NVRAM (FLASH), EEPROM, or any com-
bination of these. This interface can also connect to
SRAM that can emulate a ROM on a development
system. The bus width is 8 or 16 bits. Most of these
pins are shared with the DRAM interface, which
operates simultaneously with the ROM/NVRAM
interface.
Pin
Signal Name
Type
Description
73, 74, 76, 77,
78, 80, 83, 5,
6, 7, 9, 11, 12,
13, 14. 16
M_D[15:0]
B NVM_Data[15:0], Memory Data Bus (shared with bits
[15:0] of DRAM data bus). Use M_D[7:0] for 8-bit inter-
face.
28
M_A[11:0]
O NVM_Addr[11:0], Memory Address Bus[11:0] (shared with
DRAM address bus)
47, 49, 51, 52,
53, 54, 55, 63,
64, 65, 70, 72
M_D[27:16]
O NVM_Addr[23:12], Memory Address Bus[23:12] (shared
with bits [27:16] of DRAM data bus)
59
NVM_CE_N
O ROM/NVRAM Chip Enable.
60
NVM_OE_N
O ROM/NVRAM Output Enable.
43
M_D[31]
O Copy of ROM/NVRAM Output Enable.
61
NVM_WE_N
O NVRAM Write Enable.
Table 19. ROM/NVRAM Interface Pin Assignments
49
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