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GAL16V8C-5LP データシートの表示(PDF) - Lattice Semiconductor

部品番号
コンポーネント説明
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GAL16V8C-5LP
Lattice
Lattice Semiconductor 
GAL16V8C-5LP Datasheet PDF : 23 Pages
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SSpepceicfiicfiactaiotinosnsGGAAL1L61V68VB8
AC SWITCHING CHARACTERISTICS
Over Recommended Operating Conditions
PARAM.
TEST
COND1.
tpd
A
COM
COM / IND COM / IND
IND
COM / IND
DESCRIPTION
-7
-10
-15
-20
-25
UNITS
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.
Input or I/O to 8 outputs switching 3 7.5 3 10 3 15 3 20 3 25 ns
Comb. Output 1 output switching — 7 — — — — — — — — ns
tco
A Clock to Output Delay
2 5 2 7 2 10 2 11 2 12 ns
tcf2
— Clock to Feedback Delay
— 3 — 6 — 8 — 9 — 10 ns
tsu
— Setup Time, Input or Fdbk before Clk7 — 10 — 12 — 13 — 15 — ns
th
— Hold Time, Input or Fdbk after Clk
0 — 0 — 0 — 0 — 0 — ns
A Maximum Clock Frequency with
External Feedback, 1/(tsu + tco)
83.3 — 58.8 — 45.5 — 41.6 — 37 — MHz
fmax3
A
Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
100 — 62.5 — 50 — 45.4 — 40 — MHz
A Maximum Clock Frequency with
No Feedback
100 — 62.5 — 62.5 — 50 — 41.6 — MHz
twh
— Clock Pulse Duration, High
twl
— Clock Pulse Duration, Low
ten
B Input or I/O to Output Enabled
B OE to Output Enabled
5 — 8 — 8 — 10 — 12 — ns
5 — 8 — 8 — 10 — 12 — ns
3 9 3 10 — 15 — 20 — 25 ns
2 6 2 10 — 15 — 18 — 20 ns
tdis
C Input or I/O to Output Disabled
2 9 2 10 — 15 — 20 — 25 ns
C OE to Output Disabled
1.5 6 1.5 10 — 15 — 18 — 20 ns
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Descriptions section.
3) Refer to fmax Descriptions section.
CAPACITANCE
(T
A
=
25°C,
f
=
1.0
MHz)
SYMBOL
PARAMETER
MAXIMUM*
CI
Input Capacitance
8
CI/O
I/O Capacitance
8
*Guaranteed but not 100% tested.
UNITS
pF
pF
TEST CONDITIONS
VCC = 5.0V, VI = 2.0V
VCC = 5.0V, VI/O = 2.0V
3-77
1996 Data Book

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