CL-PS7500FE 데이터 시트보기 (PDF) - Cirrus Logic

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CL-PS7500FE

System-on-a Chip for Internet Appliance

Cirrus Logic 

CL-PS7500FE

System-on-a-Chip for Internet Appliance

For Equation 15-1, let:

n is the value programmed into the control register

v (words/µs) is the rate the video data is displayed

Lmax (µs) is the maximum latency in the memory system (this is the maximum time between the CL-PS7500FE requesting

more video data and the memory system delivering the first word of that data)

If the FIFO is almost empty, it takes 0.025 µs for a word of data to reach the bottom of the FIFO before it

can be used. The minimum value for n is deduced from the following condition to avoid the FIFO under-

flowing: There are four n words in the FIFO when the FIFO requests more data and, if not refilled, the

FIFO is empty in 4n/v µs. Therefore, n must be set as in Equation 15-1.

4n/v > (Lmax + 0.025)

Equation 15-1

The maximum value for n is deduced from the following condition to avoid the FIFO overflowing: n can

have a maximum value of 7 and the FIFO can never overflow as there are always 4 words available in the

top of the FIFO, even if the video request is serviced immediately.

15.2.1 Example

For the CL-PS7500FE, the value of v (words/µs) changes depending on the video mode and the pixel

clock rate selected. In the worst-case DMA latency, Lmax alters depending on if ROM, DRAM accesses,

or internal programming bursts are slowest, and the MEMCLK frequency used.

Chapter 9 discusses how to calculate worst-case DMA latencies for a particular system using the

CL-PS7500FE. The value calculated should be imported as Lmax into Equation 15-2.

Assume an 8-bpp mode with a pixel clock rate of 60 MHz (period = 16.7 ns). In each pixel clock tick, 1/4

of a word is used – in a whole µs, 0.25 × 1 ÷ 0.0167 = 14.9 words are required.

Hence the value of n must be:

4n/v > (Lmax + 0.025)

Equation 15-2

So, assuming an Lmax value of 1.0 µs:

n > 3.74 × (1.0 + 0.025) ≥ n > 3.83

Equation 15-3

So in this case the minimum value for n to prevent FIFO underflow is four.

June 1997

ADVANCE DATA BOOK v2.0

VIDEO MACROCELL INTERFACE

139

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