CL-PS7500FE 데이터 시트보기 (PDF) - Cirrus Logic
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CL-PS7500FE Datasheet PDF : 251 Pages
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CL-PS7500FE
System-on-a-Chip for Internet Appliance
19.1.3 Load and Store Multiple Floating Instructions
31
28 27
24 23 22 21 20 19
16 15
12 11
87
0
cond
110P
U/D Y Wb L/S
Rn
X Fd
0010
offset
The Load/Store Multiple Floating instructions allow between one and four floating-point registers to be
transferred from/to memory in a single operation. These operations allow groups of registers to be saved
and restored efficiently (for example, across context switches).
Cond
P
U/D
Y
Wb
L/S
Rn
X
Fd
Condition field
Pre/post-indexing bit:
0
post-indexing
1
pre-indexing
Up/down bit:
0
down
1
up
Register count (see below)
Write-back bit
Load/store bit
0
store to memory
1
load from memory
Base register
Register count (see below)
Floating-point register number offset – unsigned 8-bit immediate offset
The values are transferred as three words of data for each register (the data format used is not defined
(and may change in future implementations) and the only legal operation that can be performed on this
data is to load it back into the FPA using the same implementation’s LFM instruction. The data stored in
memory by an SFM instruction should not be used or modified by any user process.
NOTE: Coprocessor number 2 (bits 11:8 in the instruction field) rather than the usual FPA coprocessor number of
1 must be used for these instructions.
The offset in bits [7:0] is specified in words and is added to (U/D = 1) or subtracted from (U/D = 0) a base
register (Rn), either before (P = 1) or after (P = 0) the base is used as the transfer address. The modified
base value may be written back into the base register (Wb = 1) or the old value of the base may be pre-
served (Wb = 0). Note that post-indexed addressing modes require explicit setting of the Wb bit, unlike
LDR and STR that always write-back when post-indexed. The value of the base register, modified by the
offset in a pre-indexed instruction, is used as the address for the transfer of the first word. The second
word goes to or comes from an address one word (4 bytes) higher than the first transfer, and the address
increments by one word for each subsequent transfer.
172
FLOATING-POINT INSTRUCTION SET
ADVANCE DATA BOOK v2.0
June 1997
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