Data Sheet
November 2006
ORCA Series 2 FPGAs
Measurement Conditions
VCC GND
TO THE OUTPUT UNDER TEST
50 pF
TO THE OUTPUT UNDER TEST
1 kΩ
50 pF
ES A. Load Used to Measure Propagation Delay
B. Load Used to Measure Rising/Falling Edges
IC D Figure 74. ac Test Loads
5-3234(F).r1
V E TS[I]
E U OUT[I]
PAD
OUT
ac TEST LOADS (SHOWN ABOVE)
D IN VDD
OUT[I] VDD/2
VSS
T T PAD
C N OUT
1.5 V
0.0 V
TPHH
TPLL
E Figure 75. Output Buffer Delays
EL COPAD
IN
IN[I]
S IS 3.0V
PAD IN 1.5 V
D 0.0V
5-3233(F).ar4
VDD
IN[I] VDD/2
VSS
TPLL
TPHH
5-3235(F).a
Figure 76. Input Buffer Delays
Lattice Semiconductor
171