ST72521AR7TC 데이터 시트보기 (PDF) - STMicroelectronics

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ST72521AR7TC

8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, FIVE TIMERS, SPI, SCI, I2C, CAN INTERFACE

STMicroelectronics 

ST72521M/R/AR

12.3.3 Auxiliary Voltage Detector (AVD) Thresholds

Subject to general operating condition for VDD, fCPU, and TA.

Symbol

VIT+(AVD)

VIT-(AVD)

Vhys(AVD)

∆VIT-

Parameter

1⇒0 AVDF flag toggle threshold

(VDD rise)

0⇒1 AVDF flag toggle threshold

(VDD fall)

AVD voltage threshold hysteresis

Voltage drop between AVD flag set

and LVD reset activated

Conditions

VD level = High in option byte

VD level = Med. in option byte

VD level = Low in option byte

VD level = High in option byte

VD level = Med. in option byte

VD level = Low in option byte

VIT+(AVD)-VIT-(AVD)

VIT-(AVD)-VIT-(LVD)

1. Data based on characterization results, not tested in production.

Min Typ

4.4 1)

4.6

Max Unit

4.9

Not Applicable

4.2

4.4 4.65 1) V

Not Applicable

200

mV

450

mV

12.3.4 External Voltage Detector (EVD) Thresholds

Subject to general operating condition for VDD, fCPU, and TA.

Symbol

Parameter

Conditions

VIT+(EVD)

VIT-(EVD)

Vhys(EVD)

1⇒0 AVDF flag toggle threshold

(VDD rise)1)

0⇒1 AVDF flag toggle threshold

(VDD fall)1)

EVD voltage threshold hysteresis

VIT+(EVD)-VIT-(EVD)

1. Data based on characterization results, not tested in production.

Min Typ Max Unit

1.15 1.26 1.35

V

1.1

1.2

1.3

200

mV

158/199

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