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PIC18F45J50-I/SOSQTP 데이터 시트보기 (PDF) - Microchip Technology

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PIC18F45J50-I/SOSQTP Datasheet PDF : 562 Pages
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PIC18F46J50 FAMILY
22.5.2
USB INTERRUPT ENABLE
REGISTER (UIE)
The USB Interrupt Enable (UIE) register
(Register 22-8) contains the enable bits for the USB
status interrupt sources. Setting any of these bits will
enable the respective interrupt source in the UIR
register.
The values in this register only affect the propagation
of an interrupt condition to the microcontroller’s inter-
rupt logic. The flag bits are still set by their interrupt
conditions, allowing them to be polled and serviced
without actually generating an interrupt.
REGISTER 22-8: UIE: USB INTERRUPT ENABLE REGISTER (BANKED F36h)
U-0
bit 7
R/W-0
SOFIE
R/W-0
STALLIE
R/W-0
IDLEIE
R/W-0
TRNIE
R/W-0
ACTVIE
R/W-0
UERRIE
R/W-0
URSTIE
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
Unimplemented: Read as ‘0
bit 6
SOFIE: Start-of-Frame Token Interrupt Enable bit
1 = Start-of-Frame token interrupt is enabled
0 = Start-of-Frame token interrupt is disabled
bit 5
STALLIE: STALL Handshake Interrupt Enable bit
1 = STALL interrupt is enabled
0 = STALL interrupt is disabled
bit 4
IDLEIE: Idle Detect Interrupt Enable bit
1 = Idle detect interrupt is enabled
0 = Idle detect interrupt is disabled
bit 3
TRNIE: Transaction Complete Interrupt Enable bit
1 = Transaction interrupt is enabled
0 = Transaction interrupt is disabled
bit 2
ACTVIE: Bus Activity Detect Interrupt Enable bit
1 = Bus activity detect interrupt is enabled
0 = Bus activity detect interrupt is disabled
bit 1
UERRIE: USB Error Interrupt Enable bit
1 = USB error interrupt is enabled
0 = USB error interrupt is disabled
bit 0
URSTIE: USB Reset Interrupt Enable bit
1 = USB Reset interrupt is enabled
0 = USB Reset interrupt is disabled
2011 Microchip Technology Inc.
DS39931D-page 375

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