PSD9XX Family
AC/DC
Parameters
(cont.)
64
Preliminary Information
Figure 26a. PLD ICC /Frequency Consumption (PSD9XXFV Versions, VCC = 3 V)
60
VCC = 3V
50
40
TURBO ON (100%)
30
20
TURBO ON (25%)
PT 100%
10
TURBO OFF
0
PT 25%
0
5
10
15
20
25
HIGHEST COMPOSITE FREQUENCY AT PLD INPUTS (MHz)
Example of PSD9XX Typical Power Calculation at VCC = 5.0 V
Conditions
Highest Composite PLD input frequency
(Freq PLD)
= 8 MHz
MCU ALE frequency (Freq ALE)
= 4 MHz
% Flash Access
% SRAM access
% I/O access
= 80%
= 15%
= 5% (no additional power above base)
Operational Modes
% Normal
% Power Down Mode
= 10%
= 90%
Number of product terms used
(from fitter report)
% of total product terms
= 45 PT
= 45/153 = 29.4%
Turbo Mode
= ON
Calculation (typical numbers used)
ICC total = Ipwrdown x %pwrdown + %normal x (ICC (ac) + ICC (dc))
= Ipwrdown x %pwrdown + % normal x (%flash x 2.5 mA/MHz x Freq ALE
+ %SRAM x 1.5 mA/MHz x Freq ALE
+ % PLD x 2 mA/MHz x Freq PLD
+ #PT x 400 µA/PT
= 50 µA x 0.90 + 0.1 x (0.8 x 2.5 mA/MHz x 4 MHz
+ 0.15 x 1.5 mA/MHz x 4 MHz
+2 mA/MHz x 8 MHz
+ 45 x 0.4 mA/PT)
= 45 µA + 0.1 x (8 + 0.9 + 16 + 18 mA)
= 45 µA + 0.1 x 42.9
= 45 µA + 4.29 mA
= 4.34 mA
This is the operating power with no Flash writes or erases. Calculation is based
on IOUT = 0 mA.