ST7MC2N6T3 데이터 시트보기 (PDF) - STMicroelectronics

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ST7MC2N6T3

8-bit MCU with nested interrupts, Flash, 10-bit ADC, brushless motor control, five timers, SPI, LINSCI™

STMicroelectronics 

ST7MC1xx/ST7MC2xx

8 POWER SAVING MODES

8.1 INTRODUCTION

To give a large measure of flexibility to the applica-

tion in terms of power consumption, four main

power saving modes are implemented in the ST7

(see Figure 25): Slow, Wait (Slow-wait), Active-

halt and Halt.

After a RESET the normal operating mode is se-

lected by default (Run mode). This mode drives

the device (CPU and embedded peripherals) by

means of a master clock which is based on the

main oscillator frequency divided or multiplied by 2

(fOSC2).

From Run mode, the different power saving

modes may be selected by setting the relevant

register bits or by calling the specific ST7 software

instruction whose action depends on the oscillator

status.

Figure 25. Power Saving Mode Transitions

High

RUN

8.2 SLOW MODE

This mode has two targets:

– To reduce power consumption by decreasing the

internal clock in the device,

– To adapt the internal clock frequency (fCPU) to

the available supply voltage.

Slow mode is controlled by three bits in the MCC-

SR register: the SMS bit which enables or disables

Slow mode and two CPx bits which select the in-

ternal slow frequency (fCPU).

In this mode, the master clock frequency (fOSC2)

can be divided by 2, 4, 8 or 16. The CPU and pe-

ripherals are clocked at this lower frequency

(fCPU).

Note: Slow-wait mode is activated when entering

the Wait mode while the device is already in Slow

mode.

Figure 26. Slow Mode Clock Transitions

fCPU

fOSC2/2

fOSC2/4

fOSC2

SLOW

WAIT

SLOW WAIT

ACTIVE HALT

fOSC2

CP1:0

00

01

SMS

NEW SLOW

FREQUENCY

REQUEST

NORMAL RUN MODE

REQUEST

HALT

Low

POWER CONSUMPTION

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