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ST72F324J2TCRS 데이터 시트보기 (PDF) - STMicroelectronics

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ST72F324J2TCRS Datasheet PDF : 194 Pages
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On-chip peripherals
ST72324xx-Auto
SCIETPR
Reset value: 0000 0000 (00h)
7
6
5
4
3
2
1
0
ETPR[7:0]
R/W
Table 67. SCIETPR register description
Bit Name
Function
8-bit Extended Transmit Prescaler Register
ct(s) 7:0 ETPR[7:0]
The extended baud rate generator is activated when a value different from 00h
is stored in this register. Therefore the clock frequency issued from the 16
divider (see Figure 57) is divided by the binary factor set in the SCIETPR
register (in the range 1 to 255).
The extended baud rate generator is not used after a reset.
rodu Table 68. Baud rate selection
lete P Symbol Parameter
Conditions
fCPU
Accuracy vs.
Standard
Prescaler
Standard Baud rate Unit
t(s) - Obso fTx
Obsolete Produc fRx
Communication
frequency
8 MHz
~0.16%
~0.79%
Conventional mode
TR (or RR) = 128, PR = 13
TR (or RR) = 32, PR = 13
TR (or RR) = 16, PR = 13
TR (or RR) = 8, PR = 13
TR (or RR) = 4, PR = 13
TR (or RR) = 16, PR = 3
TR (or RR) = 2, PR =13
TR (or RR) = 1, PR = 13
Extended mode
ETPR (or ERPR) = 35,
TR (or RR)= 1, PR = 1
300
1200
2400
4800
9600
10400
19200
38400
14400
~300.48
~1201.92
~2403.84
~4807.69
~9615.38
~10416.67 Hz
~19230.77
~38461.54
~14285.71
130/193
Doc ID 13841 Rev 1

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