CS8952(2001) Просмотр технического описания (PDF) - Cirrus Logic
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CS8952 Datasheet PDF : 82 Pages
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CS8952
LPSTRT - Low Power Start. Input, Pin 50.
When this active-low input is asserted during power-up or reset, the CS8952 will exit reset in a low
power configuration, where the only circuitry enabled is that necessary to maintain the media
impedance. The CS8952 will remain in a low power state until RESET pin is asserted or the MDC pin
toggles.
This pin includes a weak internal pull-down (> 20 KΩ), or the value may be set by an external 4.7 KΩ
pull-up or pull-down resistor.
PWRDN - Power Down. Input, Pin 64.
When this pin is asserted high, the CS8952 powers down all circuitry except that circuitry needed to
maintain the network line impedance. This is the lowest power mode possible. The CS8952 will remain
in low power mode until the PWRDN pin is deasserted.
A slightly higher power power-down mode may also be entered under software control through bit 11 of
the Basic Mode Control Register (address 00h).
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CrystalLAN™ 100BASE-X and 10BASE-T Transceiver
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