PSD511B1-C-90UI Просмотр технического описания (PDF) - STMicroelectronics
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PSD511B1-C-90UI Datasheet PDF : 153 Pages
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PSD5XX Family
13.9 DC Characteristics (ZPSD5XXV Versions)
(3.0 V ± 10%)
Symbol
Parameter
Conditions
Min Typ Max Unit
VCC
VIH
VIL
VIH1
VIL1
VHYS
VOL
VOH
VSBY
ISBY
IIDLE
VDF
ISB
ILI
ILO
ICC (DC)
(Note 5)
Supply Voltage
High Level Input Voltage
Low Level Input Voltage
Reset High Level Input Voltage
Reset Low Level Input Voltage
Reset Pin Hysteresis
Output Low Voltage
Output High Voltage
SRAM Standby Voltage
SRAM Standby Current
Idle Current (VSTBY Pin)
SRAM Data Retention Voltage
Standby Supply Power Down Mode
Current
Sleep Mode
Input Leakage Current
Output Leakage Current
Operating
ZPLD Only
Supply Current
All Speeds
2.7 V < VCC < 5.5 V
2.7 V < VCC < 5.5 V
(Note 1)
(Note 1)
IOL = 20 µA, VCC = 2.7 V
IOL = 4 mA, VCC = 2.7 V
IOH = –20 µA, VCC = 2.7 V
IOH = –1 mA, VCC = 2.7 V
VCC = 0 V
VCC > VSBY
Only on VSTBY
CSI >VCC –.3 V (Note 2)
CSI >VCC –.3 V (Note 3)
VSS < VIN < VCC
0.45 < VIN < VCC
ZPLD_TURBO = OFF,
f = 0 MHz (Note 4)
ZPLD_TURBO = ON,
f = 0 MHz
2.7
.7 VCC
– 0.5
.8 VCC
–.5
0.3
2.9
2.4
2.7
– 0.1
2
–1
–10
3
0.01
0.15
2.99
2.6
0.5
5
1
±.1
±5
5.5
VCC +.5
.3 VCC
VCC +.5
.2 VCC –.1
0.1
0.45
VCC
1
0.1
15
5
1
10
See ISB
200
400
V
V
V
V
V
V
V
V
V
V
V
µA
µA
V
µA
µA
µA
µA
µA
µA/PT
ZPLD AC Base
(Note 4)
See
Fig. 51
2.0
mA/MHz
ICC (AC)
(Note 5)
EPROM AC Adder
CMiser = ON
(8-Bit Bus Mode)
All Other Cases
CMiser = ON and
8-Bit Bus Mode
0.4
1.0
mA/MHz
0.9
1.7
mA/MHz
0.7
1.3
mA/MHz
SRAM AC Adder
CMiser = ON and
16-Bit Bus MoDe
1
2
mA/MHz
CMiser = OFF
1.9
3.8
mA/MHz
NOTES:
1. Reset input has hysteresis. VIL1 is valid at or below .2VCC –.1. VIH1 is valid at or above .8VCC.
2. CSI deselected or internal PD is active.
3. Sleep mode bit is set and internal PD is active.
4. See ZPLD ICC/Frequency Power Consumption graph for details.
5. IOUT = 0 mA.
120
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