ST6220CD3/HWD 查看數據表（PDF） - STMicroelectronics

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ST6220CD3/HWD

8-BIT MCUs WITH A/D CONVERTER, TWO TIMERS, OSCILLATOR SAFEGUARD & SAFE RESET

STMicroelectronics 

ST6208C/ST6209C/ST6210C/ST6220C

11.5 CLOCK AND TIMING CHARACTERISTICS

Subject to general operating conditions for VDD, fOSC, and TA.

11.5.1 General Timings

Symbol

Parameter

Conditi ons

tc(INST)

tv(IT)

Instruction cycle time

Interrupt reaction time 2)

tv(IT) = ∆tc(INST) + 6

fCPU=8MHz

fCPU=8MHz

Min

2

3.25

6

9.75

Typ 1)

4

6.5

Max

5

8.125

11

17.875

Unit

tCPU

µs

tCPU

µs

11.5.2 External Clock Source

Symbol

Parameter

VOSCINH

VOSCINL

tw(OSCINH)

tw(OSCINL)

tr(OSCIN)

tf(OSCIN)

IL

OSCIN input pin high level voltage

OSCIN input pin low level voltage

OSCIN high or low time 3)

OSCIN rise or fall time 3)

OSCx Input leakage current

Conditions

see Figure 49

VSS≤VIN≤VDD

Min

Typ

0.7xVDD

VSS

Max

VDD

0.3xVDD

Unit

V

ns

±2

µA

Notes:

1. Data based on typical application software.

2. Time measured between interrupt event and interrupt vector fetch. ∆tc(INST) is the number of tCPU cycles needed to finish

the current instruction execution.

3. Data based on design simulation and/or technology characteristics, not tested in production.

Figure 49. Typical Application with an External Clock Source

VOSCINH

VOSCINL

90%

10%

tr(OSCIN)

tf(OSCIN)

tw(OSCINH)

tw(OSCINL)

Not connected

OSCOUT

EXTERNAL

CLOCK SOURCE

OSCIN

fOSC

IL

ST62XX

72/105

1

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