Z8018220ASC 查看數據表（PDF） - Zilog

零件编号

产品描述 (功能)

生产厂家

Z8018220ASC

ZILOG INTELLIGENT PERIPHERAL CONTROLLER (ZIP™)

Zilog 

Zilog

PRELIMINARY

SYSTEM CONTROL REGISTERS (Continued)

Z80182/Z8L182

ZILOG INTELLIGENT PERIPHERAL

OMCR

Addr 3EH

Bit M1E /M1TE /IOC -

-

-

-

-

Upon Reset 1

1

1

11 111

R/W R/W W R/W

Note:

This register should be programmed to 0x0xxxxxb

(x = don't care) as a part of Initialization.

I/O Compatibility

/M1 Temporary Enable

/M1 Enable

Figure 49. Operation Mode Control Register

ICR

Bit IOA7 IOA6 IOSTP -

Upon Reset 0

0

0

1

R/W R/W R/W R/W

-

-

11

Addr 3FH

-

-

11

I/O Stop

I/O Address

Combination of 11

is reserved

Figure 50. I/O Control Register

3-44

PS009801-0301

DS971820600

Share Link: