DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

STM32F103T8U7TR 查看數據表(PDF) - STMicroelectronics

零件编号
产品描述 (功能)
生产厂家
STM32F103T8U7TR Datasheet PDF : 123 Pages
First Prev 41 42 43 44 45 46 47 48 49 50 Next Last
Electrical characteristics
STM32F103xC, STM32F103xD, STM32F103xE
5.3.4
5.3.5
Embedded reference voltage
The parameters given in Table 13 are derived from tests performed under ambient
temperature and VDD supply voltage conditions summarized in Table 10.
Table 13. Embedded internal reference voltage
Symbol
Parameter
Conditions
Min Typ Max Unit
VREFINT Internal reference voltage
ADC sampling time when
TS_vrefint(1) reading the internal reference
voltage
–40 °C < TA < +105 °C
–40 °C < TA < +85 °C
1.16 1.20
1.16 1.20
5.1
Internal reference voltage
VRERINT(2) spread over the temperature
range
VDD = 3 V ±10 mV
TCoeff(2) Temperature coefficient
1. Shortest sampling time can be determined in the application by multiple iterations.
2. Guaranteed by design, not tested in production.
1.26
V
1.24
V
17.1(2) µs
10
mV
100 ppm/°C
Supply current characteristics
The current consumption is a function of several parameters and factors such as the
operating voltage, ambient temperature, I/O pin loading, device software configuration,
operating frequencies, I/O pin switching rate, program location in memory and executed
binary code.
The current consumption is measured as described in Figure 13: Current consumption
measurement scheme.
All Run-mode current consumption measurements given in this section are performed with a
reduced code that gives a consumption equivalent to Dhrystone 2.1 code.
Maximum current consumption
The MCU is placed under the following conditions:
All I/O pins are in input mode with a static value at VDD or VSS (no load)
All peripherals are disabled except when explicitly mentioned
The Flash memory access time is adjusted to the fHCLK frequency (0 wait state from 0
to 24 MHz, 1 wait state from 24 to 48 MHz and 2 wait states above)
Prefetch in ON (reminder: this bit must be set before clock setting and bus prescaling)
When the peripherals are enabled fPCLK1 = fHCLK/2, fPCLK2 = fHCLK
The parameters given in Table 14, Table 15 and Table 16 are derived from tests performed
under ambient temperature and VDD supply voltage conditions summarized in Table 10.
44/123
Doc ID 14611 Rev 7

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]