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FDC37B78X 查看數據表(PDF) - SMSC -> Microchip

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FDC37B78X Datasheet PDF : 258 Pages
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Figure 11 shows the soft power management
logic with the override timer path from the
button input. The override timer counts while
the button is held (in the present implementation
this would be when the button input is high) and
is cleared upon release of the button. It has a
0.5 second or faster resolution (run off of the
32kHz clock divided down) and the minimum
time for triggering the override power down is
four seconds, with a maximum of 4.5 seconds.
The timer output will pulse the clear on the Flip
Flop 1.
Figure 12 illustrates the timing of the blanking
period relative to Button_In and nPowerOn for
the override event.
Button_In
nPowerOn
Blanking Period
4+ sec
4 sec
Release
4 sec
Vcc
FIGURE 4 - BLANKING PERIOD
151

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