AD5280BRU200 查看數據表（PDF） - Analog Devices

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AD5280BRU200

15 V, I2C Compatible 256-Position Digital Potentiometers

Analog Devices 

AD5280/AD5282

AD5280 PIN CONFIGURATION

PIN CONFIGURATION

AD5282 PIN CONFIGURATION

A1

14 O1

W2

13 VL

B

VDD

SHDN

3 AD5280 12 O2

4 TOP VIEW 11 VSS

(Not to Scale)

5

10 GND

SCL 6

9 AD1

SDA 7

8 AD0

O1 1

16 A2

A1 2

15 W2

W1 3

14 B2

B1 4 AD5282 13 VL

TOP VIEW

VDD 5 (Not to Scale) 12 VSS

SHDN 6

11 GND

SCL 7

10 AD1

SDA 8

9 AD0

AD5280 PIN FUNCTION DESCRIPTION

Pin Mnemonic Description

1A

2W

3B

4 VDD

5 SHDN

6 SCL

7 SDA

8 AD0

9 AD1

10 GND

11 VSS

12 O2

13 VL

14 O1

Resistor Terminal A

Wiper Terminal W

Resistor Terminal B

Positive Power Supply. Specified for operation

from 5 V to 15 V (Sum of |VDD| + |VSS| ≤ 15 V).

Active Low, Asynchronous Connection of the

Wiper W to Terminal B and Open Circuit

of Terminal A. RDAC Register contents

unchanged. SHDN should tie to VL if not used.

Serial Clock Input

Serial Data Input/Output

Programmable Address Bit 0 for Multiple

Package Decoding. Bits AD0 and AD1 provide

four possible addresses.

Programmable Address Bit 1 for Multiple

Package Decoding. Bits AD0 and AD1 provide

four possible addresses.

Common Ground

Negative Power Supply. Specified for operation

from 0 V to –5 V (Sum of |VDD| + |VSS| ≤ 15 V).

Logic Output Terminal O2

Logic Supply Voltage. Needs to be the same

voltage as the digital logic controlling the

AD5280.

Logic Output Terminal O1

AD5282 PIN FUNCTION DESCRIPTION

Pin Mnemonic Description

1 O1

2 A1

3 W1

4 B1

5 VDD

6 SHDN

7 SCL

8 SDA

9 AD0

10 AD1

11 GND

12 VSS

13 VL

14 B2

15 W2

16 A2

Logic Output Terminal O1

Resistor Terminal A1

Wiper Terminal W1

Resistor Terminal B1

Positive Power Supply. Specified for operation

from 5 V to 15 V (Sum of |VDD| + |VSS|≤ 15 V).

Active Low, Asynchronous Connection of the

Wiper W to Terminal B and Open Circuit of

Terminal A. RDAC Register contents

unchanged. SHDN should tie to VL if not used.

Serial Clock Input

Serial Data Input/Output

Programmable Address Bit 0 for Multiple

Package Decoding. Bits AD0 and AD1 provide

four possible addresses.

Programmable Address Bit 1 for Multiple

Package Decoding. Bits AD0 and AD1 provide

four possible addresses.

Common Ground

Negative Power Supply. Specified for operation

from 0 V to –5 V (Sum of |VDD| + |VSS| ≤ 15 V).

Logic Supply Voltage. Needs to be the same

voltage as the digital logic controlling the

AD5282.

Resistor Terminal B2

Wiper Terminal W2

Resistor Terminal A2

REV. 0

–5–

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