AT89C51RC2-3CSCM(2003) 查看數據表（PDF） - Atmel Corporation

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AT89C51RC2-3CSCM
(Rev.:2003)

8-bit Microcontroller with 16K/32K Bytes Flash

Atmel Corporation 

AT89C51RB2/RC2

Functional Block

Diagram

Figure 3. Functional Oscillator Block Diagram

Reset

Reload

Xtal1

FOSC

CKRL

Osc

Xtal2

1

8-bit

:2

0

Prescaler-Divider

1

X2

CKCON0

0

Idle

CKRL = 0xFF?

CLK

PERIPH

CLK

CPU

Peripheral Clock

CPU clock

Prescaler Divider

• A hardware RESET puts the prescaler divider in the following state:

• CKRL = FFh: FCLK CPU = FCLK PERIPH = FOSC/2 (Standard C51 feature)

• Any value between FFh down to 00h can be written by software into CKRL register

in order to divide frequency of the selected oscillator:

• CKRL = 00h: minimum frequency

FCLK CPU = FCLK PERIPH = FOSC/1020 (Standard Mode)

FCLK CPU = FCLK PERIPH = FOSC/510 (X2 Mode)

• CKRL = FFh: maximum frequency

FCLK CPU = FCLK PERIPH = FOSC/2 (Standard Mode)

FCLK CPU = FCLK PERIPH = FOSC (X2 Mode)

FCLK CPU and FCLK PERIPH

In X2 Mode, for CKRL<>0xFF:

FCPU =

FCLKPERIPH

=

-----------------F----O----S----C-----------------

2 × (255 – CKRL)

In X1 Mode, for CKRL<>0xFF then:

FCPU =

FCLKPERIPH

=

-----------------F----O----S----C-----------------

4 × (255 – CKRL)

13

4180B–8051–04/03

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