AT89C51RC2-3CSCM 查看數據表（PDF） - Atmel Corporation
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AT89C51RC2-3CSCM Datasheet PDF : 127 Pages
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AT89C51RB2/RC2
Interrupt System
The AT89C51RB2/RC2 has a total of 9 interrupt vectors: two external interrupts (INT0
and INT1), three timer interrupts (timers 0, 1 and 2), the serial port interrupt, SPI inter-
rupt, Keyboard interrupt and the PCA global interrupt. These interrupts are shown in
Figure 22.
Figure 22. Interrupt Control System
INT0
IE0
TF0
INT1
IE1
TF1
PCA IT
RI
TI
IPH, IPL
3
0
3
0
3
0
3
0
3
0
3
0
High Priority
Interrupt
Interrupt
Polling
Sequence, Decreasing From
High to Low Priority
TF2
3
EXF2
0
3
KBD IT
0
3
SPI IT
0
Individual Enable
Global Disable
Low Priority
Interrupt
Each of the interrupt sources can be individually enabled or disabled by setting or clear-
ing a bit in the Interrupt Enable register (Table 45 and Table 47). This register also
contains a global disable bit, which must be cleared to disable all interrupts at once.
Each interrupt source can also be individually programmed to one out of four priority lev-
els by setting or clearing a bit in the Interrupt Priority register (Table 48) and in the
Interrupt Priority High register (Table 46 and Table 47) shows the bit values and priority
levels associated with each combination.
55
4180E–8051–10/06
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