C8051F002 查看數據表（PDF） - Silicon Laboratories
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C8051F002 Datasheet PDF : 171 Pages
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C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
20. PROGRAMMABLE COUNTER ARRAY
The Programmable Counter Array (PCA) provides enhanced timer functionality while requiring less CPU
intervention than the standard 8051 counter/timers. The PCA consists of a dedicated 16-bit counter/timer and five
16-bit capture/compare modules. Each capture/compare module has its own associated I/O line (CEXn) which is
routed through the Crossbar to Port I/O when enabled (see Section 15.1 for details on configuring the Crossbar).
The counter/timer is driven by a configurable timebase that can select between four inputs as its source: system
clock divided by twelve, system clock divided by four, Timer 0 overflow, or an external clock signal on the ECI
line. The PCA is configured and controlled through the system controller’s Special Function Registers. The basic
PCA block diagram is shown in Figure 20.1.
Figure 20.1. PCA Block Diagram
System
Clock
T0 Overflow
00
/12
01
/4
10
CPS=11
16-Bit Counter/Timer
Capture/Compare
Module 0
Capture/Compare
Module 1
Capture/Compare
Module 2
Capture/Compare
Module 3
Capture/Compare
Module 4
Crossbar
Port I/O
Rev. 1.7
154
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