C8051F045 查看數據表（PDF） - Silicon Laboratories

零件编号

产品描述 (功能)

生产厂家

C8051F045

Mixed Signal ISP Flash MCU Family

Silicon Laboratories 

C8051F040/1/2/3/4/5/6/7

SFR Definition 19.5. SMB0STA: SMBus0 Status

R/W

STA7

Bit7

R/W

STA6

Bit6

R/W

STA5

Bit5

R/W

STA4

Bit4

R/W

STA3

Bit3

R/W

STA2

Bit2

R/W

STA1

Bit1

R/W

Reset Value

STA0 11111000

Bit0

SFR Address: 0xC1

SFR Page: 0

Bits7-3:

STA7-STA3: SMBus0 Status Code.

These bits contain the SMBus0 Status Code. There are 28 possible status codes; each sta-

tus code corresponds to a single SMBus state. A valid status code is present in SMB0STA

when the SI flag (SMB0CN.3) is set to logic 1. The content of SMB0STA is not defined when

the SI flag is logic 0. Writing to the SMB0STA register at any time will yield indeterminate

results.

Bits2-0: STA2-STA0: The three least significant bits of SMB0STA are always read as logic 0 when

the SI flag is logic 1.

Rev. 1.5

251

Share Link: