C8051F045 查看數據表（PDF） - Silicon Laboratories

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C8051F045

Mixed Signal ISP Flash MCU Family

Silicon Laboratories 

C8051F040/1/2/3/4/5/6/7

12-bit ADC0 Data Word appears in the ADC0 Data Word Registers as follows:

ADC0H[3:0]:ADC0L[7:0], if AD0LJST = 0

(ADC0H[7:4] will be sign-extension of ADC0H.3 for a differential reading,

otherwise = 0000b).

ADC0H[7:0]:ADC0L[7:4], if AD0LJST = 1

(ADC0L[3:0] = 0000b).

Example: ADC0 Data Word Conversion Map, AIN0 Input in Single-Ended Mode

(AMX0CF = 0x00, AMX0SL = 0x00)

AIN0-AGND (Volts)

ADC0H:ADC0L

(AD0LJST = 0)

ADC0H:ADC0L

(AD0LJST = 1)

VREF * (4095/4096)

0x0FFF

0xFFF0

VREF / 2

0x0800

0x8000

VREF * (2047/4096)

0x07FF

0x7FF0

0

0x0000

0x0000

Example: ADC0 Data Word Conversion Map, AIN0-AIN1 Differential Input Pair

(AMX0CF = 0x01, AMX0SL = 0x00)

AIN0-AGND (Volts)

ADC0H:ADC0L

(AD0LJST = 0)

ADC0H:ADC0L

(AD0LJST = 1)

VREF * (2047/2048)

0x07FF

0x7FF0

VREF / 2

0x0400

0x4000

VREF * (1/2048)

0x0001

0x0010

0

0x0000

0x0000

-VREF * (1/2048)

0xFFFF (-1d)

0xFFF0

-VREF / 2

0xFC00 (-1024d)

0xC000

-VREF

0xF800 (-2048d)

0x8000

For AD0LJST = 0:

Code = Vin  --G-----a---i--n---  2n ; ‘n’ = 12 for Single-Ended; ‘n’=11 for Differential.

VREF

Figure 5.7. ADC0 Data Word Example

Rev. 1.5

61

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