C8051F045 查看數據表（PDF） - Silicon Laboratories

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C8051F045

Mixed Signal ISP Flash MCU Family

Silicon Laboratories 

C8051F040/1/2/3/4/5/6/7

5.4. ADC0 Programmable Window Detector

The ADC0 Programmable Window Detector continuously compares the ADC0 output to user-programmed

limits, and notifies the system when an out-of-bound condition is detected. This is especially effective in an

interrupt-driven system, saving code space and CPU bandwidth while delivering faster system response

times. The window detector interrupt flag (AD0WINT in ADC0CN) can also be used in polled mode. The

high and low bytes of the reference words are loaded into the ADC0 Greater-Than and ADC0 Less-Than

registers (ADC0GTH, ADC0GTL, ADC0LTH, and ADC0LTL). Reference comparisons are shown starting

on page 63. Notice that the window detector flag can be asserted when the measured data is inside or out-

side the user-programmed limits, depending on the programming of the ADC0GTx and ADC0LTx regis-

ters.

SFR Definition 5.9. ADC0GTH: ADC0 Greater-Than Data High Byte

R/W

R/W

R/W

R/W

R/W

R/W

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bits7-0: High byte of ADC0 Greater-Than Data Word.

R/W

R/W

Reset Value

11111111

Bit1

Bit0

SFR Address: 0xC5

SFR Page: 0

SFR Definition 5.10. ADC0GTL: ADC0 Greater-Than Data Low Byte

R/W

R/W

R/W

R/W

R/W

R/W

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bits7-0: Low byte of ADC0 Greater-Than Data Word.

R/W

R/W

Reset Value

11111111

Bit1

Bit0

SFR Address: 0xC4

SFR Page: 0

SFR Definition 5.11. ADC0LTH: ADC0 Less-Than Data High Byte

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset Value

00000000

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

SFR Address: 0xC7

SFR Page: 0

Bits7-0: High byte of ADC0 Less-Than Data Word.

62

Rev. 1.5

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