C8051F38B-GMR 查看數據表（PDF） - Silicon Laboratories

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C8051F38B-GMR

Full Speed USB Flash MCU Family

Silicon Laboratories 

C8051F380/1/2/3/4/5/6/7/C

SFR Definition 16.2. IP: Interrupt Priority

Bit

7

6

5

4

3

2

1

0

Name

PSPI0

PT2

PS0

PT1

PX1

PT0

PX0

Type

R

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset

1

0

0

0

0

0

0

0

SFR Address = 0xB8; SFR Page = All Pages; Bit-Addressable

Bit Name

Function

7 Unused Read = 1b, Write = Don't Care.

6 PSPI0 Serial Peripheral Interface (SPI0) Interrupt Priority Control.

This bit sets the priority of the SPI0 interrupt.

0: SPI0 interrupt set to low priority level.

1: SPI0 interrupt set to high priority level.

5

PT2 Timer 2 Interrupt Priority Control.

This bit sets the priority of the Timer 2 interrupt.

0: Timer 2 interrupt set to low priority level.

1: Timer 2 interrupt set to high priority level.

4

PS0 UART0 Interrupt Priority Control.

This bit sets the priority of the UART0 interrupt.

0: UART0 interrupt set to low priority level.

1: UART0 interrupt set to high priority level.

3

PT1 Timer 1 Interrupt Priority Control.

This bit sets the priority of the Timer 1 interrupt.

0: Timer 1 interrupt set to low priority level.

1: Timer 1 interrupt set to high priority level.

2

PX1 External Interrupt 1 Priority Control.

This bit sets the priority of the External Interrupt 1 interrupt.

0: External Interrupt 1 set to low priority level.

1: External Interrupt 1 set to high priority level.

1

PT0 Timer 0 Interrupt Priority Control.

This bit sets the priority of the Timer 0 interrupt.

0: Timer 0 interrupt set to low priority level.

1: Timer 0 interrupt set to high priority level.

0

PX0 External Interrupt 0 Priority Control.

This bit sets the priority of the External Interrupt 0 interrupt.

0: External Interrupt 0 set to low priority level.

1: External Interrupt 0 set to high priority level.

122

Rev. 1.4

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