C8051F38B-GMR 查看數據表（PDF） - Silicon Laboratories

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C8051F38B-GMR

Full Speed USB Flash MCU Family

Silicon Laboratories 

C8051F380/1/2/3/4/5/6/7/C

Port

P0

P1

P2

P3

Pin Number 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7

SF Signals

(32-pin

Package)

P3.1-P3.7

Unavailable on 32-pin

packages

SF Signals

(48-pin

Package)

TX0

RX0

SCK

MISO

MOSI

NSS*

SDA

SCL

CP0

CP0A

CP1

CP1A

SYSCLK

CEX0

CEX1

CEX2

CEX3

CEX4

ECI

T0

T1

TX1

RX1

SDA1

SCL1

Pin Skip 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Settings

P0SKIP

P1SKIP

P2SKIP

P3SKIP

The crossbar peripherals are assigned in priority order from top to bottom, according to this diagram.

These boxes represent Port pins which can potentially be assigned to a peripheral.

Special Function Signals are not assigned by the crossbar. When these signals are enabled, the Crossbar should be

manually configured to skip the corresponding port pins.

Pins can be “skipped” by setting the corresponding bit in PnSKIP to 1.

* NSS is only pinned out when the SPI is in 4-wire mode.

Figure 20.3. Peripheral Availability on Port I/O Pins

Rev. 1.4

155

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