C8051F38B-GMR 查看數據表（PDF） - Silicon Laboratories

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C8051F38B-GMR

Full Speed USB Flash MCU Family

Silicon Laboratories 

C8051F380/1/2/3/4/5/6/7/C

8.1. Comparator Multiplexers

C8051F380/1/2/3/4/5/6/7/C devices include an analog input multiplexer to connect Port I/O pins to the

comparator inputs. The Comparator inputs are selected in the CPTnMX registers (SFR Definition 8.5 and

SFR Definition 8.6). The CMXnP2–CMXnP0 bits select the Comparator positive input; the CMXnN2–CMX-

nN0 bits select the Comparator negative input.

Important Note About Comparator Inputs: The Port pins selected as comparator inputs should be con-

figured as analog inputs in their associated Port configuration register, and configured to be skipped by the

Crossbar (for details on Port configuration, see Section “20.3. General Purpose Port I/O” on page 161).

VDD

CP0 +

+

CP0 - -

GND

VDD

CP1 +

+

CP1 - -

GND

CPT0MX

CPT1MX

Figure 8.4. Comparator Input Multiplexer Block Diagram

Rev. 1.4

71

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