C8051F38B-GMR 查看數據表（PDF） - Silicon Laboratories

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C8051F38B-GMR

Full Speed USB Flash MCU Family

Silicon Laboratories 

C8051F380/1/2/3/4/5/6/7/C

SFR Definition 10.1. PCON: Power Control

Bit

7

6

5

4

3

2

1

0

Name

GF[5:0]

STOP

IDLE

Type

R/W

R/W

R/W

Reset

0

0

0

0

0

0

0

0

SFR Address = 0x87; SFR Page = All Pages

Bit Name

Function

7:2 GF[5:0] General Purpose Flags 5–0.

These are general purpose flags for use under software control.

1

STOP Stop Mode Select.

Setting this bit will place the CIP-51 in stop mode. This bit will always be read as 0.

1: CPU goes into stop mode (internal oscillator stopped).

0

IDLE IDLE: Idle Mode Select.

Setting this bit will place the CIP-51 in Idle mode. This bit will always be read as 0.

1: CPU goes into Idle mode. (Shuts off clock to CPU, but clock to Timers, Interrupts,

Serial Ports, and Analog Peripherals are still active.)

78

Rev. 1.4

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