CS8900A-CQZ 查看數據表（PDF） - Cirrus Logic

零件编号

产品描述 (功能)

生产厂家

CS8900A-CQZ

Crystal LAN™ Ethernet Controller

Cirrus Logic 

CS8900A

Crystal LAN™ Ethernet Controller

5.6.4 Enabling CRC Generation and Pad-

ding

Whenever the host issues a Transmit Request

command, it must indicate whether or not the

Cyclic Redundancy Check (CRC) value

should be appended to the transmit frame, and

whether or not pad bits should be added (if

needed). Table 34 describes how to configure

the CS8900A for CRC generating and pad-

ding.

Register 9, TxCMD

Inhibit

CRC

(Bit C)

0

1

0

1

TxPad

Dis

(Bit D)

0

0

1

1

Operation

Pad to 64 bytes if necessary

(including CRC).

Send a runt frame if specified

length less than 60 bytes.

Pad to 60 bytes if necessary (with-

out CRC).

Send runt if specified length less

than 64. The CS8900A will not

transmit a frame that is less than 3

bytes.

Table 34. CRC and Paddling Configuration

5.6.5 Individual Packet Transmission

Whenever the host has a packet to transmit, it

must issue a Transmit Request to the

CS8900A consisting of the following three op-

erations in the exact order shown:

1) The host must write a Transmit Command

to the TxCMD register (PacketPage base +

0144h). The contents of the TxCMD regis-

ter may be read back from the TxCMD reg-

ister (Register 9).

2) The host must write the frame's length to

the TxLength register (PacketPage base +

0146h).

3) The host must read the BusST register

(Register 18)

The information written to the TxCMD register

tells the CS8900A how to transmit the next

frame. The bits that must be programmed in

the TxCMD register are described in Table 35.

Bit

67

clear clear

clear set

set clear

set set

8

9

C

D

Register 9, TxCMD

Bit Name

Operation

Tx Start

Start preamble after 5 bytes

have been transferred to the

CS8900A.

Start preamble after 381

bytes have been trans-

ferred to the CS8900A.

Start preamble after 1021

bytes have been trans-

ferred to the CS8900A.

Start preamble after entire

frame has been transferred

to the CS8900A.

Force

When set, the CS8900A dis-

cards any frame data cur-

rently in the transmit buffer.

Onecoll

When set, the CS8900A will

not attempt to retransmit

any packet after a collision.

InhibitCRC When set, the CS8900A

does not append the 32-bit

CRC value to the end of any

transmit packet.

TxPadDis When set, the CS8900A will

not add pad bits to short

frames.

Table 35. Tx Command Configuration

For each individual packet transmission, the

host must issue a complete Transmit Request.

Furthermore, the host must write to the TxC-

MD register before each packet transmission,

even if the contents of the TxCMD register

does not change. The Transmit Request de-

scribed above may be in either Memory Space

or I/O Space.

5.6.6 Transmit in Poll Mode

In poll mode, Rdy4TxiE bit (Register B,

BufCFG, Bit 8) must be clear (Interrupt Dis-

abled). The transmit operation occurs in the

following order and is shown in Figure 30.

CIRRUS LOGIC PRODUCT DATASHEET

DS271F4

101

Share Link: